Category Archives: IP Cores

Attopsemi Technology Attended 4th Japan SOI Symposium and Presented a Talk “I-fuse: A Disruptive OTP Technology”

News

Hsinchu, Taiwan, – Nov 20, 2019 — Attopsemi Technology attended SOI Symposium on October 30th, 2019 in Yokohama, Japan and provided a talk “I-fuse™: A Disruptive OTP Technology”. The event was a huge success and attracted several hundreds of attendees.
 
In a well-received speech during the EDA/IP Session, Shine Chung,

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Faraday and UMC Collaborate to Launch a Complete Set of 22nm Fundamental IP

Partnership

Faraday Technology Corporation(TWSE: 3035), a leading ASIC design service and IP provider, and United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (“UMC”), a leading global semiconductor foundry, today announced the availability of Faraday’s fundamental IP on UMC’s 22nm ultra-low-power (ULP) and ultra-low-leakage (ULL) processes. The silicon-proven 22ULP/ULL fundamental IP, including multi-Vt

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SmartDV to Exhibit at SemIsrael Expo, ICCAD China 2019

News

SmartDV™ Technologies will exhibit at SemIsrael Expo 2019 in Airport City, Israel, November 19 and ICCAD China 2019 November 21-22 in Nanjing, China.
 
At both events, SmartDV will showcase why it is the Proven and Trusted choice for Verification and Design Intellectual Property (IP), including new additions to its

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Sofics Analog I/O’s and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes

tsmc

Belgium, October 28, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that its TakeCharge® Electrostatic Discharge (ESD) portfolio is silicon proven on TSMC’s advanced 16nm, 12nm and 7nm FinFET processes. More than 80 fabless companies use Sofics solutions to enable higher performance, higher robustness and

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OPENEDGES and INNOSILICON unveil advanced DDR Controller and DDR PHY integrated IP solutions

text labeled PRESS RELEASE

October 22, 2019 — OPENEDGES Technology, Inc. the leading IP provider of Memory subsystem IP today announced a partnership with INNOSILICON to promote OPENEDGES DDR memory controller and INNOSILICON DDR PHY. The Companies have validated the interoperability between OPENEDGES DDR3/4/LPDDR3/4 memory controller and INNOSILICON DDR3/4/LPDDR3/4 PHY.
 
INNOSILICON is a world-class,

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Sofics releases pre-silicon analog I/O’s for high-speed SerDes for TSMC N5 process technology

text labeled PRESS RELEASE

Belgium, September 26, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that it has expanded its TakeCharge® Electrostatic Discharge (ESD) and Analog I/O portfolio with solutions for TSMC’s N5 process technology. The cells enable high speed and high frequency interfaces.
 
Today many communication channels,

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