Category Archives: IP Cores

Credo selects Moortec’s In-Chip Monitoring IP to optimise performance and reliability in their latest generation of SerDes chips

News

Moortec, provider of complete In-Chip Monitoring PVT Subsystems announced today that Credo  has utilised Moortec’s Temperature Sensor and Voltage Monitor IP to optimise performace and increase reliability in their latest generation of SerDes chips.
 

 
Credo offers high-performance, mixed-signal semiconductor solutions including advanced serializer-deserializer (SerDes) IP and interconnect

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Faraday Reveals Its Multi-protocol Video Interface IP on UMC 28HPC

text labeled PRESS RELEASE

Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced the availability of its multi-protocol video interface IP on UMC 28nm HPC. The Multi-Protocol Video Interface IP solution supports both transmitter (TX) and receiver (RX) featuring a reduced silicon footprint ideal for state-of-the-art panel and

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CoreHW releases IP library with over 200 IP

Old CPU chips and obsolete computer processors

CoreHW releases an IP library with over 200 silicon verified IP. Silicon proven solutions allow fast end-product development and implementation. The IP library gives a comprehensive look to company’s IP range and makes it easier and faster for customers to start their ASIC design process.
 
The IP listed in

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MicroBT employs Moortec’s 16nm Embedded Temperature Sensor in their HPC ASIC

Moortec, providers of complete In-Chip Monitoring PVT Subsystems today announced that Shenzhen MicroBT Electronics Technology Co., Ltd. have employed Moortec’s 16FFC Temperature Sensor IP in their latest high performance computing (HPC) ASIC.
 

 
HPC is highly intensive in terms of CPU activity and requires ever increasing levels of

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CEO Talk: Randy Caplan from Silicon Creations

This interview was held with Randy Caplan, CEO at Silicon Creations.

Tell me a bit about your background?
 
[randy] I’ve actually spent my whole career in integrated circuit design.  I started right at the peak of the dot-com era, and followed the advice of the “experts” at the

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PLDA and MegaChips announce a cooperation to design PCIe controllers and PCIe PHY IP on TSMC’s 16nm Process Technology

text labeled PRESS RELEASE

PLDA, the industry leader in PCI Express® IP solutions and MegaChips, a global semiconductor company specializing in ASIC Solution Services, today announced their collaboration to design a combined PCIe Controller IP and PHY IP solution. While the combination is currently targeting the TSMC 16nm process, the PCIe Controller/PHY solution will

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