Category Archives: Qualification

Semiconductor Qualification Academy


Are you navigating the semiconductor qualification maze effectively? A lack of attention to ASIC qualification could lead to significant setbacks in cost and time for chip deployment. Our latest article sheds light on the critical importance of ASIC qualification and how it impacts your chip’s journey to high volume.

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Managing Space Grade RF Device Qualifications

What quality of on-board devices and components do you think are chosen for space missions? The answer is of course devices and components built to survive the most intense environmental factors presented in space.
To support our partners and industry colleagues, we’ve developed this blog to highlight the most important

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Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada

Austin, TX.– June 1, 2021—Criteria Labs, an industry leader in high performance RF space components and semiconductor engineering solutions has partnered with Manufacturer’s Representatives to meet the needs of its growing customer base. The firms will support Criteria Labs’ space qualified device, eutectic die attachment, die to shim attachment, chip

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Understanding High Temperature Storage Life (HTSL) in IC Qualification

For ASIC or IC, there are recommended environmental conditions for their storage which allows them to perform at proper functionally. However, it is well known that storage may not always be close to the recommended standard. This is where the high temperature storage life testing (HTSL reliability testing) comes into

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Understanding Highly Accelerated Stress Test (HAST) in IC Qualification

The Highly Accelerated Stress Test (HAST testing) involves the effects of humidity and temperature on an IC or ASIC. The HAST test is designed to test the package of the ASIC under extreme humidity and temperature conditions. Devices that pass such HAST tests will be able to withstand the normal

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Understanding ESD CDM in IC Design

In addition to the human body model (HBM) which is used to measure the electro-static discharge (ESD) that may affect IC/ASIC devices, there is also damage that may come from charged device model (CDM) which also must be tested. Although superficially similar to the HBM, the CDM is different and

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