Digital Design Verification Engineer

We are looking for experienced Senior/Staff Digital Verification Engineers to ensure the functional correctness of high-speed, real-time data-processing silicon. This role involves working on cutting-edge OTPUs that integrate digital, optical, and mixed-signal technologies. The ideal candidate will have a strong background in digital verification methodologies and a passion for developing high-performance systems for AI hardware.

Responsibilities:

• Own end-to-end verification of high-throughput digital pipelines supporting multi-GSPS input rates.
• Develop and maintain comprehensive verification environments using SystemVerilog/UVM.
• Define and implement assertion-based verification strategies for control logic and data-path correctness.
• Apply formal verification techniques to complement simulation-based verification.
• Model and validate algorithms using MATLAB/Simulink or Python.
• Support FPGA prototyping and silicon bring-up with targeted test cases and validation plans.
• Collaborate with cross-functional teams to ensure correct integration across domains.
• Analyze verification results to identify root causes and improve efficiency.
• Contribute to verification methodology development and mentor junior engineers.

Qualifications:

• 5+ years of experience in digital verification for ASICs or SoCs.
• Ownership of verification for complex blocks processing real-time data streams.
• Strong proficiency in SystemVerilog and modern verification methodologies.
• Experience verifying designs in GHz-class clock domains.
• Familiarity with EDA flows including RTL simulation and formal verification.
• Experience with high-speed IP verification such as SerDes or PCIe.
• Proficiency in MATLAB/Simulink or Python for algorithm modeling.
• Solid grounding in digital design principles and computer architecture.

Skills:

• Strong communication skills for effective collaboration.
• Ability to operate in a fast-paced, evolving environment.
• Experience with formal verification methodologies is a plus.
• Familiarity with AI/ML workloads and tensor-processing architectures is advantageous.