MTS Silicon Design Engineer

At AMD, we harness technology to tackle the world's most pressing challenges, from healthcare advancements to AI innovations. Join us to contribute to groundbreaking projects that shape the future and advance your career.

Responsibilities:

• Lead verification of complex networking IP, subsystems, and SoCs within AMD’s Network Technologies Solutions Group.
• Define verification strategy and develop scalable environments for high-speed Ethernet, PCIe, DMA, and more.
• Drive functional and performance verification to signoff on next-generation networking products.
• Develop robust UVM-based testbench architectures for IP, subsystem, and SoC-level verification.
• Create test plans, feature mappings, and coverage strategies for complex networking and data-path IP.
• Verify networking functions including packet processing, switch fabrics, and traffic management.
• Own execution of verification plans and debug architectural, functional, and performance issues.
• Collaborate with cross-functional teams to ensure high-quality deliverables and participate in design reviews.
• Mentor junior engineers and provide technical leadership within the verification team.

Qualifications:

• Bachelor’s Degree in Electrical/Computer Engineering or related field; Master’s preferred.
• Expert-level knowledge of SystemVerilog and UVM.
• Strong hands-on experience with SystemVerilog simulators and waveform debuggers.
• Proven experience in verifying complex IP/subsystems with test plans and coverage methodologies.
• Strong debug skills across architecture, RTL, and testbench layers.

Skills:

• Scripting skills in Python, Perl, Shell, Tcl, or equivalent for automation.
• Experience with industry protocols such as PCIe, AXI, Ethernet, and DMA engines.
• Strong analytical and problem-solving abilities.
• Excellent verbal and written communication skills.
• Ability to lead verification tasks independently and drive cross-team closure.