Principal Design Verification Engineer [Silicon Engineering]

SpaceX is seeking a Principal Design Verification Engineer to join its Silicon Engineering team, focusing on the development of next-generation ASICs for the Starlink broadband internet system. This role involves working with cross-disciplinary teams to enhance connectivity solutions globally, contributing to the verification and validation of complex digital designs.

Responsibilities:

• Responsible for digital ASIC and/or FPGA verification at block and system level.
• Lead and execute verification test plans, development, and milestones from beginning to end.
• Contribute towards pre-silicon verification, chip bring-up, and post-silicon validation.
• Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs.

Qualifications:

• Bachelor's degree in electrical engineering, computer engineering, or computer science.
• 10+ years of experience with design verification and test bench development.

Skills:

• Advanced degree in electrical engineering or computer engineering (preferred).
• Experience with verification methodologies such as UVM/OVM/VMM.
• Strong object-oriented programming knowledge.
• Strong problem-solving and coding skills.
• Experience in constrained random verification.
• Expertise in developing test plans, implementing coverage models, and analyzing results.
• Experience with scripting languages, e.g., Python for automation.
• RTL design, chip bring-up, and post-silicon validation experience.
• Ability to work in a dynamic environment with changing needs and requirements.