Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration – Annapurna Labs

Join the AWS Utility Computing (UC) team, where you will contribute to the development and management of innovative cloud services, including Compute, Database, Storage, IoT, and more. As part of Annapurna Labs, you will work on cutting-edge silicon and software solutions that empower customers to tackle unprecedented challenges in cloud computing. AWS is committed to fostering a diverse and inclusive work environment, promoting work-life balance, and providing opportunities for mentorship and career growth.

Responsibilities:

• Integrate multiple subsystems into top-level System on Chip (SoC) designs, ensuring correct signal routing.
• Implement and deliver high-performance, area, and power-efficient RTL to meet design specifications.
• Analyze design and microarchitecture to make informed trade-offs based on features, power, performance, or area requirements.
• Develop micro-architecture and implement SystemVerilog RTL, ensuring synthesis and timing clean designs with constraints.
• Perform lint and clock domain crossing quality checks on designs.
• Collaborate with architects, designers, verification teams, and validation teams to achieve project goals.

Qualifications:

• Experience in ASIC design and implementation.
• Proficiency in SystemVerilog and RTL design.
• Familiarity with scripting in Python.
• Strong debugging skills for analyzing RTL test failures.

Skills:

• Knowledge of microarchitecture and architecture trade-offs.
• Ability to work collaboratively in a team environment.
• Strong analytical and problem-solving skills.
• A mindset of continuous learning and curiosity.