Sr. ASIC Design Engineer

We are seeking a skilled engineer to join our team focused on AI vision processors for edge applications. Our innovative solutions enhance camera capabilities by extracting valuable data from high-resolution video streams, targeting next-generation edge AI markets such as automation, robotics, and low-power embedded systems.

Responsibilities:

• Design and implement video compression, image processing, and vector computation systems optimized for AI agents and LLM inference.
• Utilize System Verilog for processor core and memory subsystem design.
• Conduct logic design, implementation, and verification using Verilog and System Verilog.
• Synthesize and optimize RTL for timing, area, and power efficiency.
• Explore micro-architecture and architectural tradeoffs through quick modeling with scripting languages like Python and Perl.
• Develop unit-level test environments and test cases.
• Create front-end methodologies and tool flows.
• Participate in chip bring-up and testing processes.
• Analyze code coverage and functional coverage, providing recommendations to the verification team.

Qualifications:

• Master’s degree in Electrical/Electronics/Computer Engineering.
• 0-5 years of relevant experience.
• Strong understanding of computer architecture, logic design, and VLSI design.

Skills:

• Proficiency in System Verilog, Verilog, Python, and Perl.
• Experience in design verification and functional coverage.
• Ability to program in scripting languages and write assembly language programs.
• Strong communication skills and teamwork capabilities.
• Adept problem-solving abilities.
• Knowledge of logic synthesis and timing closure is a plus.