Semiconductor Latest News

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Copper Wire (Cu) Bonding Reduces Package Cost

copper-wire-bonding

Do you know someone that is not eager to reduce their ASIC production costs? I don’t.  Some say that redesign changes can lead to significant cost reduction, for instance – using a more advanced silicon technology node to shrink the die size. True, but this is a really big, painful

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Does size matter? Understanding Wafer Size

Silicon wafers are the most essential element in the realization of ICs. The semiconductor industry had invested heavily to increase the wafer size during the last 30 years, so while foundries used to produce 1 inch wafers, today’s common wafer size is 300mm (11.8 times larger than 1 inch). There

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BGA Substrate Design

Very often IC package design requires designing a BGA substrate. Substrate design and layout is very similar to any other PCB design. The difference is that the substrate size is much smaller than most of the PCBs you have seen. In this post we do something a bit unusual and

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How to Obtain ASIC Turnkey Services from TSMC and GLOBALFOUNDRIES?

Pure-play foundries are offering vanilla flavor services, meaning one can buy only wafers. ASIC design, testing, packaging and supply chain services are not part of their service offering.
 
Large IDM players, who manage their own supply chain, seek this type of engagement because they prefer to own the supply

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Understanding Maskset Type – MPW, MLM, MLR and Single-Maskset

maskset

Tapeout is a major milestone in every ASIC project lifecycle. It means the design phase is completed and you are ready to send out the GDSII to the fab for production.
The term “tapeout” was coined in 70’s. Historically, engineered used a magnetic tape to store all the ASIC design

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Semiconductor Foundries Growth 2002-2012

Update (August 2012): Our internal analysis shows GLOBALFOUNDRIES to become the second largest foundry worldwide and managed to break the 4B$ barrier. See below updated charts.
Foundry business is doing well, the semiconductor market is growing and there is a continues need for silicon component supply.
While we are aware of

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Moisture Sensitivity Level and Popcorn Effect

MSL stands for Moisture Sensitivity Level. It represent the amount of time an IC can be exposed to ambient conditions and still be assembled on a PCB without being damaged.

When the antistatic bag is opened and the ICs are exposed to ambient conditions, the moisture in the air

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Introduction to LoadBoard Design and Production

loadboard

LoadBoard (LB) is a mandatory, custom made PCB, that acts as a mechanical and electrical interface between the tester (ATE) and the device under test (DUT). LoadBoard has well-defined physical dimensions and it must fit perfectly into the tester.
 
 It is one piece of the entire ASIC Test Solution

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5 Easy Steps to Calculate ASIC Unit Cost

It happened to all of us. You come to your office one morning and find a note from your manager “what will be the ASIC’s unit cost?”
Although an ASIC unit cost has a direct impact on revenues, it is typically only visited twice: before the design starts and when

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What has IKEA to do with Chip Qualifications based on JEDEC Standards?

Walking through IKEA’s never-ending corridors you must have been seeing IKEA’s quality tests performed right in front of you. Sometimes it’s a chair being pushed by a powerful robotic arm or a drawer being opened and closed in an infinite loop with a 5.5kg sand bag inside.
 
Why is

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