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Read MoreBLOOMINGTON, Minn. – June 29, 2025 – SkyWater Technology (NASDAQ: SKYT), the trusted technology realization partner, today announced a license agreement with Infineon Technologies, granting access to a robust library of silicon-proven, mixed-signal ASIC design IP.
This new IP enables customers to design and build high-reliability mixed-signal SoCs entirely within a secure
SANTA CLARA, Calif., July 29, 2025 — Silvaco Group, Inc. (“Silvaco”) (NASDAQ: SVCO), a provider of TCAD, EDA software, and SIP solutions that enable semiconductor design and digital twin modeling through AI software and innovation, today announced that it has entered into a definitive agreement to acquire Mixel Group, Inc.
Read MoreDesigning an ASIC/Chip is a complex engineering challenge that requires careful planning and accurate estimation of the final chip size. As process nodes continue to shrink and foundry technologies diversify, having a reliable chip size calculator can save time, reduce risk, and streamline the design process. Our free online ASIC
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Woodcliff Lake, New Jersey — June 27, 2025 — Semiconductor intellectual property core provider CAST today announced a new IP core that provides lossless data compression using either the LZ4 or the Snappy algorithms. It joins CAST’s existing LZ4 and Snappy decompression IP core to provide what the company believes
Read MoreShanghai, China — June 26, 2025 — VeriSilicon (688521.SH) today released the ZSP5000 Digital Signal Processing (DSP) series IPs, which are based on its fifth-generation silicon-proven DSP architecture. This product line adopts a highly scalable and energy-efficient design, and has been deeply optimized for compute-intensive workloads such as computer vision and
Read MoreCAMPBELL, Calif., Jun. 26, 2025 – In a market fueled by the compute demands of AI, Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP for accelerating system-on-chip (SoC) creation, today announced that it has won the “AI Engineering Innovation Award” at the 8th annual AI Breakthrough Awards conducted by the market intelligence organization AI
Read More(Hsinchu Taiwan, June 26, 2025) eMemory announced that its one-time programmable (OTP) memory solution, NeoFuse, has achieved qualification on TSMC’s N3P process, an enhanced 3nm process for better power, performance and density. As eMemory’s first OTP IP qualified on the TSMC N3P process, NeoFuse OTP underscores the company’s leadership in providing
Read MoreGISTEL, BELGIUM – June 25, 2025 – Sofics bv, a world leading solution provider specializing in physical layout and design, with a focus on the built-in robustness of integrated circuits that demand superior power, performance, and area (PPA), today announced the silicon validation of its IP for TSMC’s cutting-edge
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