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Wafer cost is a critical component of IC cost calculation. Wafer cost is based on 4 main factors: wafer technology node, e.g. 5nm, 65nm, 130nm, etc. Wafer options/features, e.g. all the options required on top of the plain vanilla, e.g. mim cap, flash, high voltage, etc. Wafer volume, e.g. how
Read MoreThere are numerous steps that are involved in the design of digital (or mixed signal) circuits starting from system specifications right till the chip is manufactured. One of these steps is a process of transforming a functionally described circuit (normally in netlist) into physical layout at the lowest level (normally
Read MoreFirst introduced by Bell Labs in 1957, wire bonding is an integrated circuit (IC) manufacturing method used in more than 40 billion microelectronic devices each year. Wire bonding is used extensively for interconnecting semiconductor chips to package leads and many other applications that allow RF devices to meet stringent size,
Read MoreThis is not the first foray for Intel in the foundry services space. Back in 2013, Intel made its first attempt and started offering production of chips for Altera using the 14nm process. Soon after a couple more companies were announced to have partnered with the Intel Custom Foundry division:
Read MoreThe report forecasts total semiconductor sales will rise 11% this year following a very strong 25% increase in 2021 and an 11% increase in 2020. If achieved, it would mark the first time since 1993-1995 that the semiconductor market has enjoyed three consecutive years of double-digit growth. From 2016-2021, the
Read MoreLeuven (Belgium), February 8th 2022 – ICsense, the Leuven-based IC design house and TDK Group Company, expands its activities to meet the sustained surge in IC demand, among others from European car manufacturers and medical equipment suppliers. Therefore, it now also opens an office in Ghent, a location at the
Read MoreFDSOI stands for Fully Depleted Silicon on Insulator. FDSOI is a planar process technology that provides an alternative solution to overcome some of the limitations of bulk CMOS technology at reduced silicon geometries and smaller nodes.
The FDSOI process has two distinct features. First starting with the substrate, an
This interview was held with: Thomas Sonderman, President & CEO, SkyWater Technology.
Tell me a bit about your background
I’ve been serving the semiconductor industry my whole career and have a manufacturing background. I have seen the industry transform through its various stages and we are in
BLOOMINGTON, Minn., January 19, 2022 – SkyWater Technology (NASDAQ: SKYT), the trusted technology realization partner, today announced the launch of an apprenticeship program at its Bloomington, Minnesota facility, designed with a combination of on-the-job training and formal education, and based on industry and academic-approved curriculum through Hennepin Technical College. In partnership
Read MoreIC Insights has updated and released its comprehensive forecast and analysis of the worldwide semiconductor industry in its January Semiconductor Industry Flash Report, which is included as part of the 2022, 25th edition of The McClean Report service. Next month, the company will release the first of its four quarterly updates to the
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