80 results found
Custom RTL Design, Pre-Verified IP Cores, Verification & Validation
DDR & LPDDR Memory Controller IP, PCIe Controller IP, Ethernet MAC & PHY IP, AI/ML Compute Unit IP
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IP Customization, Low power, small footprint Design Methodology, Integration Services on Customer FPGA Boards, System Design, Consulting
IEEE 802 Data Center and Wireless FEC , OpenZR+/ Open ROADM oFEC 800GbE, SDA, ITU High-Speed Optical Communication IP Cores, Full ETSI DVB-S2X Wideband Transmitter and Receiver, AWGN Channel, 3GPP Mobile Communications
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Logic Design (Front-End), ASIC Design RTL to GDS2, Analog & RF Design, Productization, Production, Additional Services
CPU & SoC, Security, General Purpose IP, Analog IP
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DisplayPort 1.4a Transmitter, DisplayPort 1.4a Receiver, Display Stream Compression (DSC 1.2a) Encoder, Display Stream Compression (DSC 1.2a) Decoder
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General-Purpose I/O (GPIO), ESD Protection , High-speed I/O, Memory Interfaces, Special
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