Senior Manager, ASIC Design

Marvell is a leading provider of semiconductor solutions that form the backbone of data infrastructure across various sectors, including enterprise, cloud, AI, and carrier architectures. The company is focused on innovative technology that drives meaningful change and supports the transformative potential of the future. Marvell is currently seeking a Senior Manager, ASIC Design to lead its ASIC chip design team, focusing on high-performance ASIC development and collaboration with key partners.

Responsibilities:

• Lead the ASIC chip design team, overseeing end-to-end design and development of high-performance ASICs.
• Ensure technical excellence and on-time project delivery in alignment with company goals.
• Manage cross-functional coordination and execution of projects, addressing risks and escalations as needed.

Qualifications:

• Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience, or a Master’s/PhD with 3-5 years of experience, or equivalent professional experience.
• 8+ years of ASIC/SOC digital design experience.
• 3+ years of people management experience.

Skills:

• Excellent leadership, communication, and team-building skills.
• Strong knowledge of the full ASIC/SOC development cycle from microarchitecture to tape-out.
• Outstanding technical expertise in microarchitecture development, RTL coding (Verilog/SystemVerilog), synthesis, and verification methodologies.
• Hands-on design experience with industry standards/protocol stacks such as CXL, PCIe, HBM, UCIe, UALink.
• Proficiency in front-end development tools/methodologies and scripting for automation.