Low Power Design/Methodology Engineer

Qualcomm Technologies, Inc. is seeking an experienced engineer to join its Engineering Group, specifically within ASICS Engineering. The role focuses on designing adaptive power management controllers and digital power meters, with an emphasis on low power digital ASIC design.

Responsibilities:

• Design adaptive power management controllers and on-chip sensor controllers.
• Perform RTL design, simulation, synthesis, and timing analysis for IP blocks.
• Collaborate with technology and circuit design teams to finalize IP block specifications.
• Work with verification and physical design teams to implement IP designs.
• Support SoC teams in integrating low power solutions into wireless SoC chips.
• Enable low power and functional safety features in automotive SoC products.
• Create and enhance low power methodologies throughout the design cycle.
• Conduct block and chip-level power analysis and create power models.

Qualifications:

• Bachelor's degree in Science, Engineering, or related field with 2+ years of relevant experience, or a Master's degree with 1+ year, or a PhD in a related field.
• 3 years of experience in low power digital ASIC design.

Skills:

• Familiarity with ASIC front-end design processes including RTL coding and synthesis.
• Proficiency in scripting languages such as Python, Perl, and TCL.
• Understanding of electrical engineering concepts and circuit analysis.
• Experience with advanced low power techniques and tools like UPF and CLP.
• Strong debugging skills in simulation and silicon environments.