ASIC Digital Design, Architect

Synopsys is at the forefront of technological innovation, shaping the future of semiconductor technology through advanced chip design and verification. We are seeking an experienced ASIC Digital Architect to join our team and drive the development of high-performance silicon chips and software content.

Responsibilities:

• Define and develop ASIC RTL design and verification at both chip and block levels.
• Create and execute design plans for complex digital designs focusing on protocols like DDR, PCIe, CXL, UAL, and UCIe.
• Collaborate with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilize advanced design and verification methodologies and tools to achieve high-quality results.
• Mentor and guide junior engineers, promoting best practices and a culture of continuous improvement.
• Communicate with internal and external stakeholders to align on project goals and deliverables.

Qualifications:

• Extensive experience in ASIC RTL design.
• In-depth knowledge of DDR, PCIe, UAL, UCIe, and similar IO protocols and their applications.
• Proficiency in advanced digital design tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Skills:

• Visionary leadership with a strategic mindset.
• Mentorship abilities to foster talent and encourage innovation.
• Proactive problem-solving in complex environments.
• Effective communication of technical concepts to a broad audience.
• Team collaboration and valuing diversity.