Design Verification Engineer [Silicon Engineering]

SpaceX is seeking a Design Verification Engineer to contribute to the development of next-generation ASICs for the Starlink broadband internet system. This role involves working with cross-disciplinary teams to enhance connectivity solutions globally, supporting SpaceX's mission to enable human life on Mars.

Responsibilities:

• Responsible for digital ASIC verification at block and system level
• Write and review test plans, develop test harnesses and test sequences
• Develop SystemVerilog testbench infrastructure for testing designs, including DSP blocks
• Execute test plan, run regressions, and ensure code and functional coverage closure
• Automate test case generation using Python and MATLAB
• Contribute to pre-silicon verification, chip bring-up, and post-silicon validation
• Be a hands-on self-starter to fully verify complex digital designs

Qualifications:

• Bachelor's degree in electrical engineering, computer science, or computer engineering
• 1+ years of experience with design verification and test bench development

Skills:

• Advanced degree in electrical engineering or computer engineering (preferred)
• Experience with verification methodologies such as UVM
• Strong object-oriented programming knowledge
• Strong problem-solving and coding skills
• Experience in constrained random verification
• Expertise in developing test plans and analyzing results
• Experience with scripting languages, e.g., Python for automation
• RTL design, chip bring-up, and post-silicon validation experience
• Ability to work in a dynamic environment with changing needs