Category Archives: ASIC Design

Free Engineering Simulation Software To Students

Students around the world now have free access to the same leading engineering simulation solutions used by top organizations and professional engineers to create the most advanced products on the planet, thanks to ANSYS (NASDAQ: ANSS).
 

 
Released today, ANSYS® Student is a free, introductory academic software package for

Industry’s First Open-Source Chip Platforms by SiFive

SiFive, the first fabless semiconductor company to build customized, open-source enabled semiconductors, today announced its flagship Freedom family of system on a chip (SoC) platforms. Built around the free and open RISC-V instruction set architecture invented by the company’s founders at the University of California, Berkeley, SiFive’s Freedom U500 and

Dolphin Integration pushes SoC optimization to the next level with all risks managed

Minimizing the PCB footprint and the BoM cost implies embedding the Power Regulation Network (PRNet) in the SoC.
Meanwhile, minimizing drastically the SoC power consumption involves implementing several modes of activity to turn on and off different functions of the SoC, which generates noise on the supply lines during mode

3 Myths About Electronic Design You Need to Stop Believing Now

Evident in ubiquitous products like cellphones, laptops, and televisions, electronic design is a large part of everyday life. Electronic designers determine many aspects of these gadgets, from their particular features, prices, and longevity. They are pressured to design, create, and produce modern technology rapidly in accordance to the increased demand

What is Tapeout?

The term tapeout is seemingly a strange name for the final product considering that no form of tape is used in the process. However, the origins of the name go back to a time before computers or digital storage was invented.  It is important to understand that a tapeout or

Mie Fujitsu Semiconductor and CSEM develop ULP solutions for IOT

Mie Fujitsu Semiconductor Ltd (MIFS) and CSEM have penned a joint development agreement to cooperate in the development of Deeply Depleted Channel (“DDC”) and near/sub-threshold technologies for the IOT/Wearables market. The agreement encompasses the development of ultra-low voltage, ultra-low power standard cell libraries, power management cells and memories as well