Category Archives: Packaging

The Ultimate Guide to DFN Package

The ultimate guide to DFN package

The DFN (Dual Flat No-leads) and its counterpart, the QFN (Quad Flat No-leads), are increasingly prevalent in high-performance applications. They’re favored for applications ranging from consumer electronics to automotive systems due to their ability to support advanced circuitry in a small footprint. Familiarizing yourself with these packages’ specifications can dramatically

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Sarcina Technology launches AI platform To enable cost-effective customizable packaging solutions for AI applications

Palo Alto, CA – 25 March 2025. Sarcina Technology, a global semiconductor packaging specialist, is excited to announce the launch of its innovative AI platform to enable advanced AI packaging solutions that can be tailored to meet specific customer requirements. Leveraging ASE’s FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology, this platform

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ASE Expands its Chip Packaging and Testing Facility to Enable Next-Gen Applications

BAYAN LEPAS, Malaysia, February 18, 2025–ASE has officially launched its fifth plant in Penang, which will significantly build on the company’s strong packaging and testing capabilities in the Bayan Lepas Free Industrial Zone. The new plant is part of a strategic expansion plan that will expand the floor space of

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The Global Expansion of Advanced Semiconductor Packaging Facilities: A 2025 Outlook

CoWoS Package

The semiconductor industry is experiencing a surge in investment and expansion of advanced packaging facilities, driven by increasing demand for high-performance computing and other applications. Several key players are significantly expanding their capacity, aiming for substantial production increases by 2025. This expansion is geographically diverse, with major projects underway in

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Understanding Multi Chip Module (MCM)

man holding a chip

Multi Chip Modules (MCM) have emerged as a game-changing solution. As consumer demand for faster, more powerful electronics increases, traditional chip designs can no longer meet the growing need for performance and space-saving designs. MCMs offer a sophisticated approach to semiconductor architecture by integrating multiple chips into a single package.
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Understanding Heterogeneous Integration (HI)

Heterogeneous integration offers a solution by allowing different materials and components to work together seamlessly, driving innovation in various applications. This approach not only enhances system performance but also enables the development of sophisticated electronic devices that are smaller, faster, and more efficient.
 
Understanding heterogeneous integration requires a grasp

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