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ASIC Design Verfication Engineer II [Full Time] – United States

Published Date: January 07, 2026
Cisco Systems, San Jose, CA
Job Description:

Cisco is seeking talented individuals for potential future opportunities within the ASIC Group, which collaborates with various teams to develop innovative products that power the internet. This role involves working on cutting-edge communications and network processing silicon, contributing to various aspects of design and implementation.

Responsibilities:

  • Collaborate with industry experts to design and deliver advanced communications and network processing silicon.
  • Contribute to system and processor architecture, high-speed logic design, and verification.
  • Engage in digital signal processing, memory and custom library development, and physical design.
  • Own projects from concept to in-house physical implementation using the latest VLSI techniques.

Qualifications:

  • Bachelor's degree with 2 years of relevant experience or Master's degree with no experience, completed within the last 3 years or current enrollment with expected completion within 12 months.
  • Familiarity with hardware description languages (HDLs) such as Verilog or VHDL.
  • Experience with RTL design and simulation tools like Synopsys, Cadence, or Mentor Graphics.
  • Exposure to scripting languages for automation, such as Python, Perl, or TCL.
  • Familiarity with ASIC/SoC design flow including synthesis, place & route, and timing closure.

Skills:

  • Experience with ASIC verification methodologies like UVM or SystemVerilog.
  • Understanding of physical design and DFT principles.
  • Familiarity with Linux-based development environments.
  • Ability to adapt to new technologies and solve complex engineering challenges.
  • Excellent organizational, teamwork, and communication skills.

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