ASIC Design Verification Engineer, TPU Cloud Compute

Join Google as an ASIC Design Verification Engineer, where you'll play a pivotal role in shaping the future of AI/ML hardware acceleration. This position focuses on developing cutting-edge TPU technology that powers Google's most demanding applications, contributing to innovative silicon solutions that impact millions worldwide.

Responsibilities:

• Plan the verification of complex digital design blocks by understanding design specifications and collaborating with design engineers to identify key verification scenarios.
• Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).
• Identify and write coverage measures for stimulus and corner cases.
• Debug tests with design engineers to ensure functionally correct design blocks.
• Close coverage measures to identify verification gaps and demonstrate progress towards tape-out.

Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with design verification.
• Experience with SystemVerilog/Verilog.
• Master's degree or PhD in a relevant field is preferred.
• 5 years of experience with industry-standard tools and methodologies for silicon development.
• Experience in the full verification life-cycle from test planning to coverage closure.
• Experience with 2 or more SoC projects/cycles.
• Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs.
• Familiarity with ASIC standard interfaces and memory system architecture.

Skills:

• Strong understanding of design verification processes and methodologies.
• Proficiency in SystemVerilog and UVM.
• Ability to collaborate effectively with design engineers.
• Strong debugging skills for complex digital designs.
• Knowledge of ASIC design and verification tools.