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What Is Wafer Testing?
Wafer testing—often called wafer sort or probe testing—is the process of electrically evaluating individual semiconductor dies directly on the wafer. Using precision probe needles to make contact with bond pads or dedicated test structures, wafer testing allows engineers to:
Verify Device
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What Is Wafer Probe?
Wafer probe (or wafer probing) refers to the electrical testing of semiconductor dies while they are still part of the wafer. By using microscopic probe needles to contact bond pads or built-in test points on each die, engineers can:
Verify functionality:
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Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both
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Paris, France – May 19, 2025 – Foxconn Technology Group today unveiled a comprehensive €250 million investment plan in Europe, marking a strategic expansion into advanced semiconductor packaging, satellite manufacturing and electric vehicle production on the continent.
Key Highlights:
Joint Venture in Advanced Packaging: Foxconn will form
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SINGAPORE, 20 MAY 2025 – GlobalFoundries (Nasdaq: GFS) (GF) today announced plans to expand its capabilities in advanced packaging through a new Memorandum of Understanding (MOU) signed with the Agency for Science, Technology and Research (A*STAR), Singapore’s lead public sector research and development (R&D) agency.
Advanced packaging has become
May 21, 2025 — Wolfspeed, Inc. (NYSE: WOLF), a global leader in silicon carbide (SiC) and gallium nitride (GaN) technologies, today announced that it is preparing to file for Chapter 11 bankruptcy protection within the coming weeks. This decision follows challenging market conditions, including weakened demand in the industrial and
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Siemens Digital Industries Software announced today that it has entered into an agreement to acquire Excellicon. This will bring Excellicon’s best-in-class software for the development, verification, and management of timing constraints to Siemens’ EDA portfolio of software for IC design. The planned acquisition enables Siemens to deliver an
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Sheffield, UK – 20 May 2025. SureCore, the leading memory specialist, has announced the expansion of its sureFIT design service to include AI applications, using its memory design expertise to help AI chip developers achieve their complex power and performance goals.
Paul Wells, CEO at sureCore, explains:
May-20-2025 — MediaTek, the Taiwanese semiconductor giant, is poised to enter the cutting edge of chip technology with its upcoming 2nm chip, set to tape out in September 2025. The announcement, made by CEO Rick Tsai at Computex 2025, marks a significant milestone for the company and underscores its strategic
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[May-15-2025] – Taiwan Semiconductor Manufacturing Company (TSMC), the world’s leading semiconductor foundry, is dramatically expanding its manufacturing capacity both domestically and internationally in response to growing demand and ongoing tariff pressures. The company plans to construct nine new facilities in 2025 alone, a significant acceleration of its expansion strategy.
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