DPLL IP stands for digital phase locked loop IP. A DPLL is responsible for locking the phase of the NCO or the numerically controlled oscillator to a reference signal. DPLLs are frequently used to recover the timing in digital demodulators. A phase locked loop is essentially a system that creates an output signal that has a phase that is related to the phase of an input signal.



A digital phase locked loop is typically an analog phase locked loop which has been paired with a digital phase detector such as a phase frequency detector or an XOR gate.


The loop of the DPLL contains a phase detector as well that is responsible for calculating the phase error which is basically the difference between the NCO phase and the reference phase set in the system, as well as a loop filter that serves the purpose of setting the loop dynamic performance. Whatever the output of the loop filter is, it controls the numerically controlled oscillator’s phase as well as frequency. The oscillator in the system, which is an NCO, generates a periodic signal and it is the job of the phase detector to compare the phase of the signal with the input signal.


Ultimately, it moves the phase error closer and closer to zero by adjusting the oscillator so that the phases are matched with each other. Since the phases of the input and the output signal are the same, this also means that the frequencies of both the signals are similar as well. As a consequence, phase locked loops can also be used to manipulate frequencies of signals as it can help generate a frequency that is a multiple of the input signal’s frequency, or simply track the input frequency.


When it comes to the application of DPLLs in digital demodulators, they are responsible for computing the phase error with the help of the complex I/Q signal or they can also use an external sine wave captured by an analog to digital converter and lock it down.


The applications of phase locked loops are far and wide, with most devices in the radio and telecommunications sector employing the use of DPLL technology. They help to generate a stable frequency in multiples of the input frequency, they can help recover a signal from a disturbed channel, as well as being used for the demodulation of any given signal.


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