SERDES IP

SERDES s stands for Serializer/Deserializer. It is essentially an IP block that can convert parallel data into serial data. As suggested by the name, this device has two functional components that serve to convert data from parallel interfaces in each direction. These devices can be used for data transmission over a differential line when one must minimize the number of connections or Input/Output pins being used.

SERDES IPs are used for high speed communication between chips (short distance) or across chassis (long distance).

As mentioned before, there are two functional blocks or components that constitute a SERDES IP. One converts parallel to serial interfaces, called the Parallel In Serial Out, or PISO, while the other converts serial into parallel, known as the Serial In Parallel Out, or SIPO. where a PISO has a clock input, data input lines and data latches, a SIPO has extract the clock from the input signal, has data output lines and data latches.

PISO makes use of a Phase Locked Loop or PLL to convert the incoming input parallel data that it receives once per parallel clock up to a frequency consistent with serial. A SIPO, on the other hand recover the clock from the serial data, uses two registers, blocks the input stream, and then divides the clock in a manner consistent with parallel data.

SERDES IPs are useful in places where parallel data must be transmitted over serial streams or lines. In order to transmit parallel data without conversion, one would need a number of interconnects and data paths to facilitate the data movement. By converting the stream into a serial one, you can effectively reduce the number of wiring and channels you need between the transmitter and the receiver.

Click here to find vendors providing JESD204b IP core