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Silicon Creations’ Fractional-N PLL Technology Leveraged at Israel’s Bar-Ilan University SoC Lab

October 29, 2018, anysilicon

Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), today announced that the SoC Lab at Israel’s Bar-Ilan University as part of the HiPer Consortium project has successfully integrated Silicon Creations’ LC and ring PLLs (phase lock loop) intellectual property (IP) in its SoC1 chip implemented in TSMC 28HPC process node. A second chip, SoC2, implemented in TSMC 16 FinFET process node and using Silicon Creations’ ring PLL IP is just months away from tape-out.

 

Silicon Creations produces a wide range of PLLs for most advanced process nodes. These include general-purpose Fractional-N PLLs, IoT PLLs with 32kHz RTC reference clock, Low-area Core voltage PLLs and Deskew PLLs for DDR interfaces as well as ultra-low jitter ring and LC-PLLs for demanding applications. The company’s PLLs are used in almost every vertical market and are an excellent choice for smart phones, battery-operated products, networking chips, energy-efficient and IoT chips, portable audio, set-top boxes, flat panel displays, high-performance computing, and mass storage.

 

“Israel has always been a very active region for us as a company. We have delivered both PLL and SerDes IP to Israeli customers for a wide variety of applications in very challenging process nodes including FinFET down to 7nm,” said Andrew Cole, vice president, Silicon Creations. “We are pleased to contribute our proven PLL technology to the SoC Lab at Bar-Ilan and support the university in developing the next generation of electronics.”

 

About Bar-Ilan’s SoC Lab

The SoC Lab, funded by the Ministry of Economy’s Magnet Program, was established to address multiple challenges of SoC design. SoC complexity is exponentially growing due to increasing demand for integration, compute capabilities, and efficiency. This complexity brings challenges in design, integration, verification and implementation. In addition, when time to market is a significant factor, an optimized generic flow is necessary.

 

For the first time, Israel has a scaled SoC design, implementation, and measurement laboratory that combines academic research with actual industry requirements. As a part of the HiPer consortium project, the Lab teams together with the industry partners to develop a generic and scalable SOC platform on which different research projects can be explored, implemented, and tested. The Lab’s vision is to help lower the “highly advanced technologies entry bar” for Israeli companies by providing a generic SoC Platform, and thus allowing them to focus on innovation by the reduction of overheads. More information about the HiPer consortium is available at www.hiper.org.il.

 

 

About Silicon Creations

Silicon Creations is focused on providing world-class silicon intellectual property (IP) for precision and general-purpose timing (PLLs), SerDes and high-speed differential I/Os. Silicon Creations’ IP is in production from 7- to 180-nanometer process technologies. With a complete commitment to customer success, its IP has an excellent record of first silicon to mass production in customer designs. Silicon Creations, founded in 2006, is self-funded and growing. The company has development centers in Atlanta, Ga., and Krakow, Poland, and worldwide sales representation. For more information, visit www.siliconcr.com.

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