78 results found
RTL Design, Design Verification, Physical Design, Analog Design
RISC-V Ultra-Low Power Core, Configurable Clock-Gated 32-bit Bus Manager
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Analog ASIC Design and Turnkey Solution, Low Power Analog IP Design
High Speed SAR ADC, Low Power SAR ADC, Low Power Fuel Gauge Colomb Counter, Low Power 32KHz Crystal Oscillator and RTC Oscillator, Battery Monitoring System BMS AFE, Digital Isolator with/without Analog AFE
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IP Customization, Low power, small footprint Design Methodology, Integration Services on Customer FPGA Boards, System Design, Consulting
IEEE 802 Data Center and Wireless FEC , OpenZR+/ Open ROADM oFEC 800GbE, SDA, ITU High-Speed Optical Communication IP Cores, Full ETSI DVB-S2X Wideband Transmitter and Receiver, AWGN Channel, 3GPP Mobile Communications
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IP Provider for unique I/O and ESD protection, Custom I/O and ESD Design
Low Voltage ESD/EOS protection (up to 5V), HV/BCD EOS/ESD protection (5V and higher), LIN PHY (transceiver) , Programmable Clipping Circuit for Antenna pins, Radiation hard circuits, IP for chiplet Die-2-Die interfaces
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ASIC Design, ASIC Production Testing, Measurement Systems
GaN Gate Driver, SiC Gate Driver
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