ASIC Failure Analysis Engineer [Hybrid]

Cisco is seeking a Failure Analysis Engineer to join its Quality and Reliability group in San Jose, California. This hybrid role involves approximately three days in the office and focuses on performing failure analysis of ASIC products. The ideal candidate will have a strong technical background in semiconductor failure analysis and a passion for problem-solving.

Responsibilities:

• Conduct root cause failure analysis of silicon product reliability test and field failures, proposing corrective actions.
• Develop and implement standard processes for failure analysis using various FA equipment.
• Coordinate logistics and instructions to direct the failure analysis process systematically.
• Document and report failure analysis results to management.
• Serve as a technical resource for failure analysis inquiries.
• Develop and maintain relationships with FA service and equipment vendors.
• Interface with product, test, and design engineering groups to identify and characterize faults on emerging technologies.

Qualifications:

• Bachelor's degree in Electrical/Electronics Engineering or related field required; Master's degree preferred.
• 8 years of experience in semiconductor failure analysis.
• Experience writing and executing FA plans and interpreting results from FA techniques such as cross-section, X-ray, CSAM, TDR, FIB, SEM, TEM, IR/EMMI/OBIRCH.

Skills:

• Proficient in specifying hardware and implementing setups for dynamic FA using SIL and LSM.
• Experience with fault isolation techniques using ATE, Scan/ATPG, MBIST.
• Knowledge of semiconductor technology and processes, including Fab, Assembly, and Advanced Packaging.
• Understanding of transistor function, semiconductor device physics, and behavior under various operating conditions.