August 28, 2023 − Dresden, Germany – Racyics®, Europe’s leading design house for mixed-signal System-on-Chip design in advanced nodes, has announced that it is now an Arm Approved Design Partner. Over the years of providing outstanding design services for analog, mixed-signal, and digital ICs including custom IP and Turnkey ASIC solutions,
Read More
The field of chip design is constantly evolving, and Electronic Design Automation (EDA) tools have become indispensable for designing complex integrated circuits. These tools offer a wide range of functionalities to streamline the design process, optimize performance, and ensure manufacturability. However, using EDA tools efficiently requires a solid understanding of
Read More
AnySilicon, the leading marketplace for ASIC service providers, announced today that GF Micro, an independent silicon design company for over thirty years, has partnered with AnySilicon to promote its ASIC development services. As part of the AnySilicon platform, GF Micro will gain access to a full range of online marketing
Read More
Santa Clara, CA, – June 19, 2023 – MosChip Technologies, a semiconductor and system design services company, announced that Dr. Naveed Sherwani has been appointed as “Non-Executive Director” of the Company.
Dr. Sherwani has decades of experience in entrepreneurship, technical engineering and general management. Dr. Sherwani currently serves as Chairman,
Physical design engineers are responsible for creating integrated circuits (ICs) and SoCs by designing layouts. One of the important considerations in IC design is power consumption. Here are some tips for physical design engineers to save power:
Clock Gating
One of the most effective ways to reduce power
Floorplanning plays a crucial role in the physical design of an SoC and lays the foundation for an efficient and high-performance ASIC layout. In this article, we will discuss ten essential floorplanning commandments that physical design engineers can follow to ensure a correct-by-construction design.
Design Partitioning
Design Partitioning