To support its fast growth, SCALINX opened this month, in addition to its ASIC design centers in Paris and Caen, the third one in Sophia-Antipolis, France, offering services for custom designed Integrated Circuits.
“We are very excited to be opening our third ASIC design center, which has a highly
Clock is the heart of synchronous digital systems. All the events in an SoC are controlled by the active edge of the clock and clock frequency is often synonymous with throughput and performance. The distribution of clock is an interesting problem involving a plethora of design trade-offs. Designers need to
Read More
Belgrade, Serbia – June 11th, 2019 – HDL Design House, provider of digital, analog, and back-end design and verification services and products in numerous areas of SoC and complex FPGA designs, today announced the appointment of a new sales representative, Mr Wim Rijlaarsdam, for the territory of Belgium, the Netherlands and Israel.
Read More
On-chip capacitors are a critical element in analog and mixed signal ASIC designs and playing a key role in helping engineers reach target performance. On-chip capacitors are limited in their quality and size and often introducing design challenges where engineers need to compromise capacitor type, chip cost and performance. This
Read More
Marvell (NASDAQ: MRVL) today announced it has entered into definitive agreements to purchase Avera Semiconductor, the Application Specific Integrated Circuit (ASIC) business of GLOBALFOUNDRIES. This acquisition brings together Avera Semi’s leading custom design capabilities with Marvell’s advanced technology platform and scale, creating a leading ASIC supplier for wired and wireless
Read More
Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced its achievement in delivering more than 10 successful projects in the Data Communication market. These projects, implemented primarily on UMC 28nm HPC and 40nm LP, cover applications such as access, aggregation switches, server adaptors, and
Read More