ASIC Design Archives - Page 26 of 42

Understanding ASIC Development

ASIC is an acronym for Application Specific Integrated Circuit. It is designed for a specific or customized use as opposed to one that serves a generally available. Examples of ASIC include chips that are designed to run specific devices such as Apple A11 CPU for example. You can find ASIC

Power Management for Internet of Things (IoT) System on a Chip (SoC) Development

The Internet of Things (IoT) is the interconnection of millions of autonomous devices to the internet. These devices collect data on physical parameters and processes and report those to the network. Some autonomously, or by network command, provide outputs that control other equipment and systems.

There are a wide

Near zero power consumption for RFID chips with Dolphin Integration’s SESAME eLC standard cell library

For RFID Tags, dynamic power consumption is a critical performance as the capability to lower power translates into a wider range of detection (RFID tag read range) and a highest identification rate in the same range.

One of the main degree of freedom to improve power consumption of RFID

SIDE-CHANNEL ATTACKS: How Differential Power Analysis (DPA) and Simple Power Analysis (SPA) Works

There are many techniques available for hackers to gain access to a system and obtain secret keys or other proprietary information– from invasive methods, such as microprobing, to non-invasive methods, such as cryptoanalysis. However, one of the easiest and most effective ways to extract the contents of a chip is

Sondrel Expands into India

Sondrel, a UK headquartered IC Design Consultancy, today announced the establishment of an entity in India, having opened its first engineering design centre in Hyderabad. The company provide concept to silicon design services to an international client base.

The continued rapid growth of Sondrel has seen new design centres

AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST

Belgrade, Serbia – September 19th, 2017 – AFuzion, the safety-critical systems and certification company and HDL Design House, provider of digital, analog, and back-end design and verification services and products in numerous areas of SoC, will host a joint webinar on DO-254 best practices and verification optimization for avionics hardware

Category Archives: ASIC Design

Understanding ASIC Development

Power Management for Internet of Things (IoT) System on a Chip (SoC) Development

Near zero power consumption for RFID chips with Dolphin Integration’s SESAME eLC standard cell library

SIDE-CHANNEL ATTACKS: How Differential Power Analysis (DPA) and Simple Power Analysis (SPA) Works

Sondrel Expands into India

AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST

Follow Us

Semiconductor Services

Category Archives: ASIC Design

Understanding ASIC Development

Power Management for Internet of Things (IoT) System on a Chip (SoC) Development

Near zero power consumption for RFID chips with Dolphin Integration’s SESAME eLC standard cell library

SIDE-CHANNEL ATTACKS: How Differential Power Analysis (DPA) and Simple Power Analysis (SPA) Works

Sondrel Expands into India

AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST

Find ASIC Services

Find IP Cores

Follow Us

Semiconductor Services