Category Archives: Packaging

High-Bandwidth Memory (HBM) Webinar Video

SK hynix, Inc., Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete high-bandwidth memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect an SoC and an HBM memory stack. Many companies are already using HBM to

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Designing for Power Integrity: Status, Challenges and Opportunities

It has been almost two decades since the target impedance concept was first proposed for the design of power distribution networks. Both academia and industry have come a long way since then by proposing solutions for managing power integrity in packages and printed circuit boards (PCB). This paper briefly reviews

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The Ultimate Guide to QFN Package

QFN Package Overview
 
The QFN (Quad Flat No-lead) package is probably the most popular semiconductor package today because of four reasons: low cost, small form factor and good electrical and thermal performance. In this article we will provide an overview to QFN packaging, discuss QFN package technical details and

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Semiconductor Packaging History and Trends

 
Since the invention of the first semiconductor package in 1965, the semiconductor packaging technology has grown dramatically and several thousands of different semiconductor package types have been made. The chart below presents the semiconductor packaging history. Particularly it shows the two major trends in semiconductor packaging:  addressing high pin

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RF Package Design Focusing Portability

Today, the (SiP) System-in-Package approach offers a new dimension to system integration, far beyond mere dense micro-packaging of existing System on Chip solutions. Not only does SiP offer the capability to integrate almost any kind of companion passive component with a given active circuit, but it also enables flexible combinations

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2 Easy Steps to Find Semiconductor Packaging

Semiconductor Packaging has become a critical factor to any semiconductor company success. Engineers have to select a semiconductor package effectively to both meet demanding price pressure but also system level performance requirements and size limitations.
 
Furthermore, with today’s price pressures – companies are spending more time in finding, selecting,

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