3D Through Silicon Vias (TSV) is in MEMS, CMOS Image Sensors and high-end applications. When will it be used for mainstream consumer applications?… All results are part of the new report released by Yole Développement (Yole): 3DIC & 2.5D TSV Interconnect for Advanced Packaging – 2014 Business Update. This technology
Read MoreThis is a guest post by Jesse Galloway and Ted Okpe of Amkor Technology. Article reprinted from May 2014 Electronics Cooling magazine.
One of the more challenging thermal resistance measurements to make for electronic packages is the junction-to-case resistance called Theta jc. The equation for Theta jc, equation (1), is straightforward.
Read MoreWhile assembly houses are gradually becoming more and more organized in regards to following internal processes, it seems that we, their customers, are often trying to push them to make shortcuts only because “we are running out of time”.
With chip design cycle time shrinking, production related tasks such
Semiconductor foundries claim they release a new technology node every two years. They may be off by a year or two, but on the whole, this is quite impressive, no doubt. Come to think of it, I don’t believe many of us even change our mobile phone every two years. How
Read MoreTwo years ago TSMC announced its plans to expand into IC packaging services. It is unclear how much these plans succeeded up till now, but it definitely seems that TSMC is now in an excellent position to take a big bite into the advanced IC packaging market, enter into direct competition
Read MoreThe name leadframe (or lead-frame) is actually very accurate.
Leadframe is an alloy frame that consists of the package leads and the paddle. The silicon die is attached on the paddle and the leads are connected to the die with wirebonds. That’s it.
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