Wafer Level Packaging or WLP, is a type of IC packaging technology that is performed at wafer level. This means that the packaging is applied on whole wafers and wafers are diced only after the packaging is successfully competed. In wafer level packaging, the components used in assembly (such as
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First introduced by Bell Labs in 1957, wire bonding is an integrated circuit (IC) manufacturing method used in more than 40 billion microelectronic devices each year. Wire bonding is used extensively for interconnecting semiconductor chips to package leads and many other applications that allow RF devices to meet stringent size,
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Because Sondrel offers a full turnkey service of ASIC production from design through to shipping silicon, it knows what is happening with services at every stage of the manufacturing and test process. It says that it has noticed increased lead times for SOC package design and manufacturing, particularly for flip
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It has been our pleasure to interview Sureshbabu K, MD of Caliber Interconnect Solutions. In this engaging conversation, he shares Caliber’s journey so far and what lies ahead for his company as it has emerged stronger in the post pandemic world and poised to grow significantly in the years to
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AnySilicon, the leading marketplace for semiconductor service providers, announced today that QP Technologies, a worldwide leader in packaging and assembly services, has partnered with AnySilicon to promote its IC packaging and assembly services. As part of the AnySilicon platform, QP Technologies will gain access to a full range of online
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Boston, MA – AEMtec GmbH from Berlin, Germany, a company widely known for its high precision microelectronic and Silicon Photonic assembly capabilities, announced today the September 1st opening of its anticipated Engineering Tech Center within the Boston University Photonics Center.
Says Robin Jerratsch, a highly skilled and experienced microelectronics