TES Electronic Solutions GmbH adds to its IP portfolio a new VHDL-based CAN Flexible Data-Rate (FD) controller IP core. The IP is designed for System-on-Chip (SoC) implementations and can be integrated into a wide range of applications and target technologies. It supports both ASIC and FPGA designs.
Key Benefits
CAN FD Support: Compatible
Kaiserslautern, Germany, January 06, 2025 – Creonic GmbH, the leading provider of ready-for-use IP cores for communication systems, announces an updated version of its SDA OCT IP Core. The new release introduces architectural improvements and extends standard support to simplify system integration and supporting both current and future Optical Communications Terminal (OCT) deployments that have been
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Collaboration aims to accelerate Europe’s adoption of chiplets and advanced 2.5D and 3D chip packaging solutions
December 15, 2025 — Avnet ASIC, a leading provider of ASIC and SoC turnkey solutions, a division of Avnet (NASDAQ: AVT) and a TSMC VCA, together with Bar-Ilan University, announced a strategic collaboration to establish an Advanced Chiplet
Woodcliff Lake, NJ — December 11, 2025 — Semiconductor intellectual property provider CAST today announced the MSC-CTRL Microsecond Channel Controller IP core, a configurable master controller that gives ASIC and FPGA designers a deterministic, microsecond-accurate serial link to smart automotive power and sensor devices.
The new core implements multiple Microsecond Channel protocols in a
December 10, 2025 — Southborough, MA & Bengaluru — Virtusa Corporation, a global leader in digital engineering and technology services, today announced the acquisition of SmartSoC Solutions, a fast-growing semiconductor engineering and IC design services company headquartered in Bengaluru, India.
The acquisition strengthens Virtusa’s position in the rapidly expanding semiconductor sector and creates a fully
December 9, 2025 — TES Electronic Solutions GmbH expands its industrial ASIC portfolio with a new 3.3 V CAN transceiver IP, built on XFAB’s high‑voltage XT018 SOI process. The IP supports up to 1 MBaud data rates, a ±58 V absolute maximum input voltage, and delivers good EMI performance.
Key Benefits
Single-Chip CAN Solution: Designed for co-integration