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Selecting a Wedge Bonder – Tutorial

Palomar/Hughes started designing and manufacturing wedge bonders in the early 1980s for the aerospace and defense industries. Later, these machines were used for a wider array of applications beyond just military, including medical devices, RF/Wireless packages, automotive sensor systems, and optoelectronic systems and components. Ultrasonic wedge bonding was introduced in the early

Debugging in System Verilog Constrained Random Verification

70 % of ASIC design goes in verification and 70 % of verification goes in debugging.
 
Planning for the debugging goes a long way. Feature by feature the way we architect the test bench pay some attention as to how will it be debugged. This strategy will pay back

Demystifying Analog & Mixed-Signal ASICs

Application Specific Integrated Circuits, ASICs, typically conjure up the notion of massively complex logic chips containing tens or hundreds of thousands (even millions) of transistors configured to solve a customer’s unique set of problems. Unlike multi-function standard product ICs such as a micro-controller that can find its way into

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AnySilicon is operating a truly unbiased semiconductor blog focused on ASIC design and manufacturing topics. We welcome individuals and companies to take part in our knowledge ecosystem and submit technical or marketing articles in the following areas:
 

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Are Power Planes Necessary for High Speed Signaling?

The performance of a system depends heavily on the communication speed between integrated circuits, which is constrained by the power delivery networks (PDNs). The disruption between the power and ground planes based on the low target impedance concept induces return path discontinuities during data transitions, which create displacement  current  sources

Beyond RTL part 2: Domain-Specific Languages

This is the second part of my “Beyond RTL” series, where I examine alternatives to Register Transfer Level (RTL). The first part talks mostly about High-Level Synthesis, its genesis, and the state of the art of free and commercial tools that transform C/C++/SystemC to RTL. I highlighted the fundamental limitations that these

Beyond RTL part 1: High-Level Synthesis

Let’s say for a minute that you believe that it is finally time to drop RTL (maybe it was my previous post that convinced you). What can I say? I’m glad! You now have to pick among several competing technologies, each with its pros and cons, each of course claiming to be the best,

2014 top MEMS Players ranking: Rising of the first MEMS titan

With an impressive 20% growth in MEMS revenue compared to 2013, and sales revenues of more than $1.2B, Robert Bosch GmbH is the clear #1. From Yole Développement’s yearly analysis of “TOP 100 MEMS Players”, analysts have released the “2014 TOP 20 MEMS Players Ranking”. This ranking shows the clear

The 6 Must-Do’s for Semiconductor Fabless Start-ups

Getting funding for a semiconductor startup is not getting easier. According to CBIngishts, there have been fewer than 20 Angel/Seed and Series A deals in the USA in each year since 2009.
 
So where is all the funding channeled to? In 2013, close to a quarter of all VC

Corner-based Timing Signoff and What Is Next?

The corner-based timing signoff approach is a historical and traditional method that has justified a development and enhancements of conventional STA tools and signoff flows. The number of signoff corners exponentially grows along with an increase of variation sources, their magnitude, and timing margins. It becomes a bottleneck in