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Design Verification, Design Implementation (RTL to GDSII), RTL Design, Design for Test (DFT), Analog & Mixed Signal Design, Emulation and Post Silicon Validation
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ADVANCED VERIFICATION, ASIC/FPGA/HW, EMBEDDED SYSTEMS AND SOFTWARE DESIGN, FUNCTIONAL SAFETY, TRAINING, EIC ACADEMY
TRNG IP Cores, SHA3 IP Cores, RSA Keygen IP Cores, RSA IP Cores, ECDSA IP Cores, DRBG IP Cores, AES GCM IP Cores, MIL-STD-1553-IP CORE, ARINC664 END SYSTEM IP CORE, ARINC664 SWITCH IP CORE, ARINC429 IP CORE, PRACH IP Suite
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RTL Design and FPGA Implementation, Design Verification, Design for Test (DFT), Physical Design
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RTL Logic Design, Functional Verification, Place and Route / Layout, Architecture Design, FPGA Prototyping and Emulation, Leadership and Consulting: Technology Selection, Methodology, Planning, Audits
Custom IP Core or VIP Development
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