80 results found
RTL Design, Design Verification, Physical Design, Analog Design
RISC-V Ultra-Low Power Core, Configurable Clock-Gated 32-bit Bus Manager
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RTL Design, Verification, Analog Layout, Physical Design, System Engineering, Embedded Software/Firmware
Custom SerDes, ARM HSSTP PHY with Link Layer, PCIe PHY, XAUI PHY, CEI SR PHY, SATA PHY
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Full turnkey ASIC, IC design services, Analog and mixed signal IP, Supply Chain Management, Team augmentation
Power Management, Data Converters, Clock Management, Sensors , Front Ends
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General-Purpose I/O (GPIO), ESD Protection , High-speed I/O, Memory Interfaces, Special
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Chip Design and Development, Device Implementation, Turnkey solutions, Speciality funding
12 bit SAR ADC, Digital temperature sensor
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