75 results found
RTL Design, Design Verification, Physical Design, Analog Design
RISC-V Ultra-Low Power Core, Configurable Clock-Gated 32-bit Bus Manager
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IC Design Services, Data converters, Power & Power management, High performance analog, Digital control, Lab validation
SARADC – 37.5 MS/s 12 bit SAR ADC, SARADC – 2MS/s 14 bit SAR ADC w/o Calibration, LLSDADC – High Resolution Low Latency ΣΔ ADC, SDCRDAC – 24 bit Sigma-Delta DAC, CRDAC – 12 bit charge-redistribution DAC, FIRDAC – High Accuracy Low OOBN ΣΔ DAC
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CC EAL5+ certification of customer chips, Secure personalization of customer chips
TESIC RISC-V CC EAL5+ Secure Element, TESIC CC EAL5+ Secure Element
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Analog / Mixed Signal ASIC Design, Circuit Design, Back-End Services, Custom PDK and PCELL, Low Cost ASIC or ASSP, Smart Integrated Power
Analog Signal Path IP (Amplifiers, ADCs, DACs, LDOs)
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Design Services, Time and Material (T&M) contracting
PRBS-71532-HS: 32Gbps Pseudo Random Bit Sequence (PRBS) Generator/Checker of 7, 15, 31 order., 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
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