Chip IP

IP Cores

DisplayPort 1.4a Transmitter, DisplayPort 1.4a Receiver, Display Stream Compression (DSC 1.2a) Encoder, Display Stream Compression (DSC 1.2a) Decoder

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Services

Intellectual Property (IP) & Process Technology, SoC/ASIC Development Platform, Design Flow, Packaging & Testing, Production Service, Application-Oriented Value-Added Services

IP Cores

USB3.1 Gen1 IP Solutions, Technology Optimized Standard Cell Library, ESD Robust Multi-Voltage I/O, Low Power SRAM with High Production Yield

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Services

Advanced ASIC Development, New Product Introduction (NPI) Engineering, High Volume Manufacturing (HVM) Enablement

IP Cores

HBM3 PHY & Controller, Non-Coherent Network-on-Chip (NOC), Coherent Network-on-Chip (NOC), DDR5/4 PHY & Controller, Die-to-Die (D2D) Interconnect, Analog & Configurable I/Os

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Services

Physical Design, RTL Synthesis and verification, STA

IP Cores

DDR

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