80 results found
CC EAL5+ certification of customer chips, Secure personalization of customer chips
TESIC RISC-V CC EAL5+ Secure Element, TESIC CC EAL5+ Secure Element
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RTL Design, Design Verification, Physical Design, Analog Design
RISC-V Ultra-Low Power Core, Configurable Clock-Gated 32-bit Bus Manager
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Logic Design (Front-End), ASIC Design RTL to GDS2, Analog & RF Design, Productization, Production, Additional Services
CPU & SoC, Security, General Purpose IP, Analog IP
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Design Services
Standard Cells Libraries, TCAM & CAM, SRAM & ROM, Custom PDK and PCELL, Register Files
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