79 results found
RTL Design, Verification, Analog Layout, Physical Design, System Engineering, Embedded Software/Firmware
Custom SerDes, ARM HSSTP PHY with Link Layer, PCIe PHY, XAUI PHY, CEI SR PHY, SATA PHY
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Logic Design (Front-End), ASIC Design RTL to GDS2, Analog & RF Design, Productization, Production, Additional Services
CPU & SoC, Security, General Purpose IP, Analog IP
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Custom RTL Design, Pre-Verified IP Cores, Verification & Validation
DDR & LPDDR Memory Controller IP, PCIe Controller IP, Ethernet MAC & PHY IP, AI/ML Compute Unit IP
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Design Services, Time and Material (T&M) contracting
PRBS-71532-HS: 32Gbps Pseudo Random Bit Sequence (PRBS) Generator/Checker of 7, 15, 31 order., 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
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IP Customization—System Design—Consulting
Forward Error Correction, Voice & Data Compression, Security, Telecom DSP, Communication Protocols & Networking, Baseband PHYs
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