Semiconductor Latest News

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Presto Engineering’s Extensive Test Capabilities Enable It to Offer Customers Parallel Testing of Automotive Products to Provide Much Faster Time to Market

car

Automotive electronics testing is one of the most exacting of all test and qualification protocols before production release because of the safety and liability considerations. The AEC Q100 revisions, ZVEI and its French equivalent SIA for accelerated environment stress tests not only list the time or number of cycles that

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Sankalp Semiconductor announces ARM Empowered Design Suite

Sankalp Semiconductor, a design service company offering comprehensive digital & mixed signal SoC services and solutions, today announced ARM Empowered Design, a suite for ARM based concept to product realization services with special emphasis on IoT and intelligent edge solutions. ARM Empowered Design offers customized engagement models that complement customer

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Outlook Remains Bright for Automotive Electronic Systems Growth

Sales of automotive electronic systems are forecast to increase 7.0% in 2018 and 6.3% in 2019, the highest growth rate in both years among the six major end-use applications for semiconductors.  Figure 1 shows that sales of automotive-related electronic systems are forecast to increase to $152 billion in 2018 from

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Andes Technology and INVECAS Announce Partnership to Win RISC-V-Based SoC Designs for Advanced Processes

Partnership

Andes Technology Corporation, a leading supplier of small, low-power, high performance 32-/64-bit embedded CPU cores, and INVECAS, a provider of leading edge IP solutions, design services and turn-key ASIC capabilities today announced a partnership. The aim of the collaboration is to win RISC-V-based SoC designs for advanced Fab processes. Andes

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Amkor Introduces TOLL & PSMC Packages for Automotive Applications

car

The TOLL package is a highly efficient space-saving package featuring extremely low Rds(on) and strong thermal performance making it well suited for high current and high voltage applications. It meets an existing JEDEC package outline, is 30% smaller and 50% thinner than a DDPAK package. The TOLL package leads are designed with wettable flanks

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Top 15 Semiconductor Sales Leaders – 2018F

IC Insights’ November Update to the 2018 McClean Report, released later this month, includes a discussion of the forecasted top-25 semiconductor suppliers in 2018 (the top-15 2018 semiconductor suppliers are covered in this research bulletin).  The Update also includes a detailed five-year forecast of the IC market by product type (including dollar volume, unit shipments,

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WLCSP Overview, Market and Applications

fan in wlcsp vs fan out wlcsp feature

Since the development of the first ASIC, the IC package was a mean to protect the silicon die and to provide means to PCB connectivity. Back then, the IC package was large and introduced various electrical parasitic.
 
WLCSP package is one of the latest and most impressive invention of

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CEO Talk: Randy Caplan from Silicon Creations

This interview was held with Randy Caplan, CEO at Silicon Creations.

Tell me a bit about your background?
 
[randy] I’ve actually spent my whole career in integrated circuit design.  I started right at the peak of the dot-com era, and followed the advice of the “experts” at the

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GLOBALFOUNDRIES Introduces Avera Semi, a Wholly Owned Subsidiary to Deliver Custom ASIC Solutions

News

GLOBALFOUNDRIES today announced the establishment of Avera Semiconductor LLC, a wholly owned subsidiary dedicated to providing custom silicon solutions for a broad range of applications. Avera Semi will leverage deep ties with GF to deliver ASIC offerings on 14/12nm and more mature technologies while providing clients new capabilities and access

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PLDA and MegaChips announce a cooperation to design PCIe controllers and PCIe PHY IP on TSMC’s 16nm Process Technology

text labeled PRESS RELEASE

PLDA, the industry leader in PCI Express® IP solutions and MegaChips, a global semiconductor company specializing in ASIC Solution Services, today announced their collaboration to design a combined PCIe Controller IP and PHY IP solution. While the combination is currently targeting the TSMC 16nm process, the PCIe Controller/PHY solution will

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