80 results found
RTL Design, Design Verification, Physical Design, Analog Design
RISC-V Ultra-Low Power Core, Configurable Clock-Gated 32-bit Bus Manager
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ASIC/FPGA Design Services, Analog & Mixed Signal Design, Custom Layout, Digital Design Services, Foundry Services, Post Silicon Validation Services, SoC Turnkey Design
IP Marketplace
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Hardware Verification, Software Testing, Security, Safety, Training
Verification IP, ARM-based VIP, Hi-Speed VIP, MIPI VIP, Memory and Storage VIP, Universal Serial IO VIP
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IP Provider for unique I/O and ESD protection, Custom I/O and ESD Design
Low Voltage ESD/EOS protection (up to 5V), HV/BCD EOS/ESD protection (5V and higher), LIN PHY (transceiver) , Programmable Clipping Circuit for Antenna pins, Radiation hard circuits, IP for chiplet Die-2-Die interfaces
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1G to 1,000Gbps Interlaken IP cores, 1G to 400Gbps Ethernet IP Cores, Low latency Ethernet for Financial Markets
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