80 results found
Custom RTL Design, Pre-Verified IP Cores, Verification & Validation
DDR & LPDDR Memory Controller IP, PCIe Controller IP, Ethernet MAC & PHY IP, AI/ML Compute Unit IP
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IP Provider for unique I/O and ESD protection, Custom I/O and ESD Design
Low Voltage ESD/EOS protection (up to 5V), HV/BCD EOS/ESD protection (5V and higher), LIN PHY (transceiver) , Programmable Clipping Circuit for Antenna pins, Radiation hard circuits, IP for chiplet Die-2-Die interfaces
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Hardware Verification, Software Testing, Security, Safety, Training
Verification IP, ARM-based VIP, Hi-Speed VIP, MIPI VIP, Memory and Storage VIP, Universal Serial IO VIP
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Advanced ASIC Development, New Product Introduction (NPI) Engineering, High Volume Manufacturing (HVM) Enablement
HBM3 PHY & Controller, Non-Coherent Network-on-Chip (NOC), Coherent Network-on-Chip (NOC), DDR5/4 PHY & Controller, Die-to-Die (D2D) Interconnect, Analog & Configurable I/Os
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