76 results found
General-Purpose I/O (GPIO), ESD Protection , High-speed I/O, Memory Interfaces, Special
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RTL Design, Design Verification, Physical Design, Analog Design
RISC-V Ultra-Low Power Core, Configurable Clock-Gated 32-bit Bus Manager
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IP Provider for unique I/O and ESD protection, Custom I/O and ESD Design
Low Voltage ESD/EOS protection (up to 5V), HV/BCD EOS/ESD protection (5V and higher), LIN PHY (transceiver) , Programmable Clipping Circuit for Antenna pins, Radiation hard circuits, IP for chiplet Die-2-Die interfaces
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ASIC Design, ASIC Production Testing, Measurement Systems
GaN Gate Driver, SiC Gate Driver
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Integrated Circuit (IC) Design, Full Turn-Key ASIC Supplier, Fabless Manufacturing
Logic Families, Analog
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