Switching Noise in Wireless ASIC Applications

March 09, 2015, anysilicon

There has been a substantial amount of discussion about the noise of power supplies and its harmful effect inside wireless electronic devices such as cell phones and WiFi or bluetooth enabled portable devices. Due to an increased pressure to extend battery life in portable devices, switching (or DC-DC) regulators have been extensively used in their design because of their natural high efficiency. But, DC-DC regulators are often the primary source of power supply noise in any system. This created noise must be filtered by additional circuitries that often result in increased design complexity and cost.



Figure 1. Common implementation of a DC/DC and LDO combination to produce 1.2V from 3.6V.



One common method to reduce the switching supply noise is to position a linear regulator immediately after the DC-DC regulator. Figure 1 illustrates this approach where a 1.2V power supply is created from a 3.6V battery by using a step-down DC/DC regulator and an LDO. Efficiency, board space, and cost are all sacrificed to simply reduce the ripple voltage. Furthermore, the fact that linear regulators can behave like a high-pass filter is often overlooked. A simple linear regulator may not be able to filter the switching noise of a modern DC/DC regulator which is designed for portable devices. So, the extra cost and additional effort might be completely wasted if the power delivery system is not planned properly.



Ripple rejection or Power Supply Rejection Ratio (PSRR) of a commercially available LDO is shown in Figure 2. Ripple rejection of this particular LDO is close to 60dB (1000X) at low frequencies of 10-1000Hz and less than 30dB (30X) at around 100kHz. Ripple rejection drops to 0dB (1X) above 600kHz frequency (no attenuation at all). A 100mV ripple voltage at 10Hz frequency would be reduced to roughly 100μV by this LDO. However, the same 100mV ripple at 100kHz is lessened to around 3mV, and at 1MHz the same 100mV ripple would simply passes through this LDO without any reduction at all.


Figure 2. Ripple Rejection from a Typical LDO.


Employing an LDO to reduce ripple voltage and noise in a system requires high ripple rejection (or PSRR) values at frequencies of interest, not merely at low frequencies such as 10Hz or 100Hz. Ideally, the selected LDO would have a high PSRR at the switching frequency of the chosen DC-DC regulator in order for it to be effective. Figure 3 shows measured ripple voltage of a commercially available DC-DC switching regulator that is designed for portable applications (operating in low power mode).





Figure 3. Output of a commercially available DC/DC regulator operating in low power mode.


A good power management solution in wireless portable electronic systems should be low noise, efficient, small in size, and cost effective. Preferably, an efficient DC-DC switching regulator that can maintain a low voltage ripple would be the best choice. Yet, using an LDO with today’s DC-DC regulators can help lowering high ripple voltage at a price of lower system efficiency, higher cost, larger board space, larger amount of heat, and reduced overall battery life.



This is a guest post by Aivaka that provides tailored power management solutions