ASIC Design Archives - Page 27 of 42

AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST

Belgrade, Serbia – September 19th, 2017 – AFuzion, the safety-critical systems and certification company and HDL Design House, provider of digital, analog, and back-end design and verification services and products in numerous areas of SoC, will host a joint webinar on DO-254 best practices and verification optimization for avionics hardware

Addressing Clock Tree Synthesis (CTS) Challenges in SoC Designs

Clock tree synthesis (CTS) plays an important role in building well-balanced clock tree, fixing timing violations and reducing the extra unnecessary pessimism in the design. The goal during building a clock tree is to reduce the skew, maintain symmetrical clock tree structure and to cover all the registers in the

eASIC Engages Si-Edge to Provide Additional Advanced Design Center Support in China for eASIC’s Custom IC Platform

eASIC® Corporation (@easic), a fabless semiconductor company that delivers custom integrated circuit platform solutions (eASIC Platform), today announced that it has appointed Si-Edge Technology (Si-Edge) as an advanced design center located in Hong Kong and Shenzhen, China.

The eASIC Platform has been deployed in a wide range of applications spanning wired

The case for integrating FPGA fabrics with CPU architectures

As this happens, designers are debating how they can approach designs in such a way that they’re not relying on packing yet-more transistors onto a chip to achieve speed increases. One of the biggest innovations in this industry is going to come from a fundamental reapplication of a technology that

Why The Time is Right for Open Source Hardware and ‘Chips as a Service’

The open source software movement has been credited as a key driver of the birth of the Internet Age. Without developments such as Linux; the free Apache Web-server platform; and tools such as Java, Perl and Ruby, the Web as we know it would likely not have been possible.

Read More

Sondrel Announces £10M Investment in European Semiconductor Sector

Sondrel today announced its target to hire 100 electronic engineers in Europe, amounting to an investment of ten million pounds into the semiconductor sector over the next 3 years.

This comes swiftly on the heels of the acquisition of the IMGWorks team from Imagination Technologies; a move that increased the engineering headcount

Category Archives: ASIC Design

AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST

Addressing Clock Tree Synthesis (CTS) Challenges in SoC Designs

eASIC Engages Si-Edge to Provide Additional Advanced Design Center Support in China for eASIC’s Custom IC Platform

The case for integrating FPGA fabrics with CPU architectures

Why The Time is Right for Open Source Hardware and ‘Chips as a Service’

Sondrel Announces £10M Investment in European Semiconductor Sector

Follow Us

Semiconductor Services

Category Archives: ASIC Design

AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST

Addressing Clock Tree Synthesis (CTS) Challenges in SoC Designs

eASIC Engages Si-Edge to Provide Additional Advanced Design Center Support in China for eASIC’s Custom IC Platform

The case for integrating FPGA fabrics with CPU architectures

Why The Time is Right for Open Source Hardware and ‘Chips as a Service’

Sondrel Announces £10M Investment in European Semiconductor Sector

Find ASIC Services

Find IP Cores

Follow Us

Semiconductor Services