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Faraday Exhibits AI FPGA-to-ASIC Solution and IoT SoC Platform at DAC 2018

June 12, 2018, anysilicon

Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced that it will showcase their AI FPGA-to-ASIC solution and the Uranus+™ ultra-low-power IoT SoC development platform at Design Automation Conference (DAC), June 25-27, 2018 in San Francisco, CA, USA.

 

Faraday’s FPGA-to-ASIC conversion service has successfully completed several AI related projects including drone vision, medical image analysis, smart appliances, and 3D sensing. It brings remarkable power savings, enhanced performance, and lower system cost to meet specific AI requirements. By leveraging a comprehensive IP solutions suite and advanced FinFET process nodes, the service is particularly well suited for AI chips requiring higher bandwidth and a lower latency interface.

 

The demonstrated Uranus+ platform is a 32-bit MCU-based ultra-low-power SoC with embedded flash, implemented by UMC 55ULP technology, targeting to accelerate the development of IoT applications. It features DVFS power modes management to balance trade-offs between performance and power consumption. In particular, its Turbo Mode enables MCU core to achieve 2x performance under same operating voltage.

 

 

Uranus+ IoT SoC Development Platform – DVFS Operation Modes

 

“We are very excited to present our latest ASIC solutions at DAC,” said Flash Lin, Chief Operating Officer of Faraday. “Founded since 1993, we position ourselves as the driver of ASIC design service innovation. As the demand for AI ASIC chips is growing, we look forward to exploring more opportunities at the show and building strong business relationships in the US.”

 

Visit Faraday’s booth at #2138 and find out the latest solutions from Faraday.

 

Evan Ke
886.3.5787888 ext. 88689
evan@faraday-tech.com