Semiconductor Intellectual Property core, commonly referred to as IP Core or IP block, is a reusable, circuit, block, or design that is the intellectual property of someone or a company. It can, however, be licensed for use by another party.
IP Cores are very common in Application-Specific Integrated Circuits (ASICs) and System on Chip (SoC) designs since they can be used as building blocks to speed up the development time while reducing risk. The use of the IP Cores in chip design became very popular since year 2000. Today, there are over 100 companies that develop and sell IP cores in various domains: analog, digital, RF etc.
ASIC and SoC designers can choose from two types of IP Cores depending on whether the designer requires the hardware description language (HDL) code or a final hardware layout of an ASIC already pre-mapped, fixed, and thoroughly tested.
The two IP Core types are the Soft IP cores and the Hard IP cores.
Soft IP Cores
Designers choose these IP Cores when they only require the hardware description language (HDL) code.
These IP Cores provide ASIC designers with the hardware description language (HDL) software macros they require for their application-specific designs. They are commonly offered as a synthesizable resistor–transistor logic (RTL) in an HDL like VHDL or Verilog or generic gate-level netlists (a logical function of an IP Core in the form of a Boolean algebra that is affected as application-specific standard cells or generic gates).
Soft IP Cores allow designers to adjust designs at the functional level. However, most Soft IP Core vendors do not offer support or warranty for the altered designs.
Although the Soft IP Cores allow for a synthesis, placement, and routing, such IP cores’ performance depends on the layout, thus designers must be meticulous in achieving good performance speeds.
Hard IP Cores
These are the IP Cores that designers choose when they only require the hardware layout of an integrated circuit or logic gate system that is already pre-mapped, fixed, and thoroughly tested.
These IP cores offer a higher and guaranteed performance compared to the soft IP cores. They are also fully supported by most foundries and silicon nodes, and designers can easily use them as drop in blocks in their designs.
When designers choose to use the Hard IPs they first determine the processing requirements and then select a hard IP Core to match the required performance. Hard IP Cores are used both analog and digital logic gates. The analog IP cores like DAC, ADC, SerDes, and PLLs are provided as transistor-layout formats. The Digital IP cores are also provided in layout formats.
The main disadvantage of using hard IP Cores is that designers can not significantly alter the function of the chips since they are already designed and embedded on the electronic wafers.
Also, the low-level transistor layouts used in Hard IP Cores must obey the foundry process of the user (the company using the IP core for manufacturing embedded systems). As a result, hard cores delivered for one specific foundry process may not be ported for a different foundry process. That is why some hard IP core merchants like TSMC, GF, Samsung, and the like offer hard IP cores specific to their foundry processes.
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