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Cyient Semiconductors

Global

Cyient Semiconductors is a fabless provider delivering custom ASICs, ASSPs, and custom products with end-to-end design and global engineering expertise.

Services

Turnkey ASIC Programs, ASIC Architecture & Front‑End Design, Physical Design & IC Layout, Verification, DFT & Sign‑Off, Manufacturing, Test & Qualification Management, Program & Supply‑Chain Integration

IP Cores

Third‑Party IP Integration & Enablement, Interface IP & Subsystem Integration (Controller + PHY Enablement)

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Faraday Technology Corporation

Taiwan

A leading fabless ASIC / SoC design service and silicon IP provider with 20 years of experience.

Services

Intellectual Property (IP) & Process Technology, SoC/ASIC Development Platform, Design Flow, Packaging & Testing, Production Service, Application-Oriented Value-Added Services

IP Cores

USB3.1 Gen1 IP Solutions, Technology Optimized Standard Cell Library, ESD Robust Multi-Voltage I/O, Low Power SRAM with High Production Yield

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SystematIC Design

The Netherlands

SystematIC is analog, mixed-signal ASIC & system design service company, with proven experience on Sensor Interfacing and Power conversion.

Services

SystematIC- Custom ASIC Design, Turnkey (Supply chain Services), Sensor Interfacing, Integrated Power, High Voltage Expertise

IP Cores

Analog IP

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Device Engineering Incorporated

USA

Device Engineering is a Tempe, AZ, USA-based design and manufacturing facility specializing in Analog and Mixed-Signal Integrated Circuits.

Services

Analog & Mixed Signal IC Design Services – Sample Capabilities, Design & Layout Tools, RF ASIC Design & Wireless Integrated Circuits, RF ASIC Design Tools, Analog Semi-Custom Arrays (700 Series), Analog Semi-Custom Arrays (Data Archive)

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Digicomm Semiconductor

India

Digicomm Semiconductor is a specialized engineering firm providing advanced end-to-end ASIC design, Packaging, and embedded software services.

Services

RTL Design and Verification, Design Verification, Design For Test, Physical Design, Static Timing Analysis, Post Silicon Validation

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