IP Cores Archives - Page 24 of 52

Faraday and UMC Collaborate to Launch a Complete Set of 22nm Fundamental IP

Faraday Technology Corporation(TWSE: 3035), a leading ASIC design service and IP provider, and United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (“UMC”), a leading global semiconductor foundry, today announced the availability of Faraday’s fundamental IP on UMC’s 22nm ultra-low-power (ULP) and ultra-low-leakage (ULL) processes. The silicon-proven 22ULP/ULL fundamental IP, including multi-Vt

SmartDV to Exhibit at SemIsrael Expo, ICCAD China 2019

SmartDV™ Technologies will exhibit at SemIsrael Expo 2019 in Airport City, Israel, November 19 and ICCAD China 2019 November 21-22 in Nanjing, China.

At both events, SmartDV will showcase why it is the Proven and Trusted choice for Verification and Design Intellectual Property (IP), including new additions to its

Sofics Analog I/O’s and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes

Belgium, October 28, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that its TakeCharge® Electrostatic Discharge (ESD) portfolio is silicon proven on TSMC’s advanced 16nm, 12nm and 7nm FinFET processes. More than 80 fabless companies use Sofics solutions to enable higher performance, higher robustness and

OPENEDGES and INNOSILICON unveil advanced DDR Controller and DDR PHY integrated IP solutions

October 22, 2019 — OPENEDGES Technology, Inc. the leading IP provider of Memory subsystem IP today announced a partnership with INNOSILICON to promote OPENEDGES DDR memory controller and INNOSILICON DDR PHY. The Companies have validated the interoperability between OPENEDGES DDR3/4/LPDDR3/4 memory controller and INNOSILICON DDR3/4/LPDDR3/4 PHY.

INNOSILICON is a world-class,

Sofics releases pre-silicon analog I/O’s for high-speed SerDes for TSMC N5 process technology

Belgium, September 26, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that it has expanded its TakeCharge® Electrostatic Discharge (ESD) and Analog I/O portfolio with solutions for TSMC’s N5 process technology. The cells enable high speed and high frequency interfaces.

Today many communication channels,

Moortec Drives Optimized Performance & Increased Device Reliability on TSMC’s N5 and N5P Process Technologies with its Complete In-Chip Monitoring Subsystem

Plymouth, UK, 23rd September 2019 — Moortec, a leading provider of in-chip monitoring and optimisation IP, today announced the availability of its latest In-Chip Monitoring IP Subsystem on TSMC’s N5 and N5P process technologies.

A global acceleration in cutting-edge technologies including 5G, Artificial Intelligence (AI), Machine Learning and Data Centre

Category Archives: IP Cores

Faraday and UMC Collaborate to Launch a Complete Set of 22nm Fundamental IP

SmartDV to Exhibit at SemIsrael Expo, ICCAD China 2019

Sofics Analog I/O’s and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes

OPENEDGES and INNOSILICON unveil advanced DDR Controller and DDR PHY integrated IP solutions

Sofics releases pre-silicon analog I/O’s for high-speed SerDes for TSMC N5 process technology

Moortec Drives Optimized Performance & Increased Device Reliability on TSMC’s N5 and N5P Process Technologies with its Complete In-Chip Monitoring Subsystem

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Category Archives: IP Cores

Faraday and UMC Collaborate to Launch a Complete Set of 22nm Fundamental IP

SmartDV to Exhibit at SemIsrael Expo, ICCAD China 2019

Sofics Analog I/O’s and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes

OPENEDGES and INNOSILICON unveil advanced DDR Controller and DDR PHY integrated IP solutions

Sofics releases pre-silicon analog I/O’s for high-speed SerDes for TSMC N5 process technology

Moortec Drives Optimized Performance & Increased Device Reliability on TSMC’s N5 and N5P Process Technologies with its Complete In-Chip Monitoring Subsystem

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