Freelancers Database

5049607

Israel

Freelancer with extensive experience in managing ASIC/SoC projects both analog, digital and mixed signal. Experience is running feasibility studies and managing ASIC production and operation.

5049608

I am an Analog/RFIC circuit designer with more than 18 years of experience.

5049609

UK

RTL expert digital designer.

5049610

Israel

SOC/ASIC architecture consultant with 23 years’ experience in system and ASIC architecture, video and image, (2D/3D) processing architecture.

5049611

21 yrs EDA / ASIC Methodology and PD / STA / UPF professional.

3511351

India

I have been working as Layout engineer . I also have experience in drc, lvs and latchup deck writing.

1974117

Algeria

Proficiency in Integrated Circuit Design such as: LNA, VCO, Mixer, TIA, RF Filters, Distributed amplifiers, PLL, etc. Also Backend and verification skills DRC, LVS, XRC, etc.

2719201

Israel

30 years of experience in: SystemVerilog & UVM, Verilog, VHDL & Chip Design Expert & Lecturer.

06061970

Ireland

A highly experienced Physical Designer with over 20 years of knowledge gained in the Semiconductor Industry, providing both CMOS and BiCMOS mixed signal layout design services.

5059607

Netherlands

Digital and mixed-signal ASIC development and verification.

7250019

USA

ASIC/SoC physical design engineer and project manager with 20 years of industry experience. Expert in all steps required to go from RTL to GDSII.

3888231

USA

A problem-solving and self-motivated ENGINEERING EXECUTIVE with demonstrated experience in electrical engineering, semiconductor processing, design of experiments, testing, electrical and physical failure analysis for root cause.

0706992

France

I have more than 7 years of experience in VHDL design on FPGA, with strong experience in Ethernet protocols.

07101994

Spain

I have 5 years of experience in RTL design using verilog and system verilog.

5049601

USA

Highly experienced and skilled physical design engineer with vast experience with tools and process nodes.

1982091

Romania

I am a senior verification engineer, working in ASIC functional verification since 2005. I have deep knowledge on ASIC verification using SystemVerilog with UVM and e language (Specman) with eRM.

2891991

USA

I am Verification Engineer, with Hands on expertise on ASIC/IP/Subsystem Verification, also excelled in VIP development, Very much optimistic and ready to learn new things.

20221031

Netherlands

High-level proficiency in interpretation of Calibre / PVS / Assura DRC, LVS and ERC. Strong background in layout design considerations (Matching, Latch-up, ESD, Electromigration, Charge-up, Antenna Effect) to ensure the quality of work.

8314160

USA

I am a designer and flow creator. Provide me with RTL & I'll return a chip design.

5049612

Belgium

A motivated and dedicated digital IC design engineer with 9 years of experience. Experienced in digital frontend design flow, from initial conception through design and verification to signoff activities like Static Timing Analysis.