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RTL Design, Verification, Analog Layout, Physical Design, System Engineering, Embedded Software/Firmware
Custom SerDes, ARM HSSTP PHY with Link Layer, PCIe PHY, XAUI PHY, CEI SR PHY, SATA PHY
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Design Verification, Design Implementation (RTL to GDSII), RTL Design, Design for Test (DFT), Analog & Mixed Signal Design, Emulation and Post Silicon Validation
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ASIC Design, Embedded Algorithms Design, Wafer Testing, Packaging , Quality
High-Voltage IP Cores, Analog IP Cores , Digital IP Cores
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Substrate and Packaging Design, Advanced Packaging Assembly, Substrate Manufacturing, Packaging Services, Full Turn Key
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SiPass Silicon Platform as a Service, System in Package (SiP) Turnkey Service, ChipStarter Multi-Client ASIC Programs
Analog and Mixed Signal IP, Graphic and Peripheral IP, Interface Controller & PHY IP, Memory and Logic Library IP, Multimedia & Wireless Communication IP, Processor & Microcontroller IP
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