80 results found
Analog / Mixed Signal ASIC Design, Circuit Design, Back-End Services, Custom PDK and PCELL, Low Cost ASIC or ASSP, Smart Integrated Power
Analog Signal Path IP (Amplifiers, ADCs, DACs, LDOs)
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IP Provider for unique I/O and ESD protection, Custom I/O and ESD Design
Low Voltage ESD/EOS protection (up to 5V), HV/BCD EOS/ESD protection (5V and higher), LIN PHY (transceiver) , Programmable Clipping Circuit for Antenna pins, Radiation hard circuits, IP for chiplet Die-2-Die interfaces
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Hardware Verification, Software Testing, Security, Safety, Training
Verification IP, ARM-based VIP, Hi-Speed VIP, MIPI VIP, Memory and Storage VIP, Universal Serial IO VIP
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RTL Design and Verification, Design Verification, Design For Test, Physical Design, Static Timing Analysis, Post Silicon Validation
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